Traditionally, microphone bias pins are expected to deliver 3.75 V and currents up to 1.6 mA to bias mono or stereo electret microphones. So far 0.35 um CMOS, or larger geometries have been used to design audio codecs. These technologies offer 5V tolerant transistors and thus a simple operational amplifier is used in a non-inverting configuration to achieve the desired results. To accommodate more audio channels, and maintain a reasonable die size, switching to smaller geometries, like 0.18 um, is eminent. This however offers a new challenge since 5V tolerant transistors are not available on such geometries. To solve that problem a number of voltage biasing circuit schemes are available.
In one approach two power supply voltages can be made available: 3.3V to operate the input stage and 5.0V to operate the output stage and provide the conventional 3.75V bias for the microphone. One problem that arises from this is the need to protect the one or more transistors in the output stage from over voltage from the 5V supply that would lead to premature device failure, e.g. due to exceeding maximum recommended voltage of the device. Herein, maximum recommended voltage refers to the voltage across any two terminals of a device that should not be exceeded (for example in 0.18 um, the maximum recommended voltage of high voltage transistors is 3.63V). Another problem is to protect those transistors especially if the 5V power supply is powered up before the 3.3V. This protection must apply when both the 5.0V and 3.3V power supplies are on, or when the 5.0V power supply is the only one available e.g. such as can occur during system power-ups or power-downs. In another approach a single 5V power supply can be used to operate the entire circuit. This is a less practical solution, since all the transistors used in input and output stages will need protection.